CSIR-Central Electronics Engineering Research Institute, a premier electronics research institute under CSIR based at Pilani, Rajasthan, has announced recruitment for Project Scientist-I and Project Scientist-II positions along with other project staff roles for various ongoing projects. The institute has a total of 10 vacancies across different groups, including a skilling initiative in emerging technologies under the Societal Electronics Group. The positions are purely temporary project engagements offering candidates an opportunity to work on advanced research in electronics and allied fields.
CSIR CEERI Project Scientist-I and Project Scientist-II Recruitment 2026
Posted 17 Oct 2026Updated 17 Oct 2026PF-09/2026
Total Vacancies
10
Last Date
02 Nov
15 days left
Apply Mode
Online
Contract
Status
Apply Now
Recruitment status
Applications open
Last date 02 Nov 2026 · 15 days left
- Notification16 Oct
- Applications Open16 Oct
About CSIR CEERI Project Scientist-I and Project Scientist-II Recruitment 2026
Job Overview
- Organization
- CSIR-Central Electronics Engineering Research Institute
- Advertisement No.
- PF-09/2026
- Post Name
- PAT-II, Senior PAT and 6 more
- Job Location
- Pilani, Rajasthan
- Who Can Apply
- Candidates from anywhere in India
- Job Type
- Contract
- Age Limit
- Up to 55 years
- Gender
- All
- Nationality
- Indian
- Credentials Required
- For JRF: selection through CSIR-UGC NET (including Lectureship/Assistant Professorship) or GATE, or a national-level examination conducted by central government departments and their agencies such as DST, DBT, DAE, DOS, DRDO, MoE, ICAR, ICMR, IITs, IISc, IISERs, NISER
- Tenure
- Six months initially or co-terminus with the present project or till the job to be performed exists, whichever is earlier; extendable in six-month steps based on performance, with total project staff tenure not exceeding six years
Vacancy Breakdown
PAT-II
1
Senior PAT
1
Project Assistant-II
1
PAT-I
1
JRF
1
Project Scientist-I
2
Project Scientist-II
2
Project Associate-I(PAT-I)
1
Total10
| Post Name | Total |
|---|---|
| PAT-II | 1 |
| Senior PAT | 1 |
| Project Assistant-II | 1 |
| PAT-I | 1 |
| JRF | 1 |
| Project Scientist-I | 2 |
| Project Scientist-II | 2 |
| Project Associate-I(PAT-I) | 1 |
| Grand Total | 10 |
Eligibility Details
Requirements differ by post — open a post to see its own.
PAT-II1 post
- Qualification
- M.Tech/ M.E in Electronics and Communication Engineering/ Microwave; OR B.Tech/ B.E in Electronics and Communication Engineering/ Microwave with 2 years experience in R&D; OR M.Sc in Physics/ Electronics/ Optoelectronics/ Microwave with 2 years experience in R&D.
- Experience
- 2 years experience in R&D for B.Tech/B.E and M.Sc candidates
- Age Limit
- 35 years
- Post Code
- 3413
- Project
- CLP-3365, Design development and characterization of interaction structures for W-band and G-band interaction structure
- Group
- High Power Microwave Devices Group (HPMSG)
Senior PAT1 post
- Qualification
- M.Tech/ M.E in Electronics and Communication Engineering/ Microwave; OR B.Tech/ B.E in Electronics and Communication Engineering/ Microwave with 2 years experience in R&D; OR M.Sc in Physics/ Electronics/ Optoelectronics/ Microwave with 3 years experience in R&D.
- Experience
- 2 years experience in R&D for B.Tech/B.E candidates and 3 years for M.Sc candidates
- Age Limit
- 40 years
- Post Code
- 3413
- Project
- CLP-3365, Design development and characterization of interaction structures for W-band and G-band interaction structure
- Group
- High Power Microwave Devices Group (HPMSG)
Project Assistant-II1 post
- Qualification
- B.Sc or 3 years diploma in engineering and technology (ECE/ EE/ Physics/ Electronics/ Material Science) or equivalent. Desirable: working knowledge of embedded systems, knowledge of PCB design, programming skills in Arduino, knowledge of circuit design.
- Age Limit
- 35 years
- Post Code
- 3414
- Project
- HCP002502, CSIR Integrated skill initiative phase-III
- Area
- CSIR-CEERI, Jaipur Campus
PAT-I1 post
- Qualification
- B.E/ B.Tech/ M.Sc (Electronics/ ECE/ EEE/ Electronics & Instrumentation/ Electrical Engineering/ Electronics & Telecommunication/ Microwave/ Mechatronics/ MEMS/ Physics) or equivalent. Desirable: working knowledge of embedded systems, knowledge of PCB design, microcontroller programming, programming skills in Arduino, knowledge of circuit design and PCB design.
- Age Limit
- 35 years
- Post Code
- 3414
- Project
- HCP002502, CSIR Integrated skill initiative phase-III
- Area
- CSIR-CEERI, Jaipur Campus
JRF1 post
- Qualification
- Graduate degree/B.E./B.Tech./Post Graduate degree/ M.E./M.Tech. in Electronics, Electrical Engineering, Electrical & Electronics Engineering, Electronics & Communication Engineering, Electronics & Instrumentation, Computer Science, or equivalent discipline. Additionally, candidates must have been selected through CSIR-UGC NET (including Lectureship/Assistant Professorship) or GATE, or through a national-level examination conducted by central government departments and their agencies such as DST, DBT, DAE, DOS, DRDO, MoE, ICAR, ICMR, IITs, IISc, IISERs, NISER.
- Age Limit
- 30 years
- Note
- If a JRF candidate is not found, a Project Associate-I or Project Associate-II may be hired.
- Post Code
- 3415
- Project
- GAP-6226, Modelling Drug-Induced liver injury (DILI) in high throughput organ on chip device with integrated electrochemical system
- Group
- Intelligent Instrumentation Research Group (IIRG)
Project Scientist-I2 posts
- Qualification
- Doctoral Degree in Science or Master's Degree in engineering or technology from a recognized university or equivalent. Preferable: experience in integrated circuit design flow, hardware accelerators, sensor interface circuit design, analog design, HDLs, and EDA tools such as Cadence, Synopsys.
- Age Limit
- 55 years
- Post Code
- 3416
- Project
- GAP-3423, Multilevel capacity building and skilling in industry-aligned emerging technologies
- Group
- Societal Electronics Group (SEG)
Project Scientist-II2 posts
- Qualification
- Doctoral Degree in Science or Master's Degree in engineering or technology from a recognized university or equivalent, and 3 years experience in R&D in industrial and academic institutions or S&T organizations, along with scientific activities and services. Preferable: experience in integrated circuit design flow, hardware accelerators, sensor interface circuit design, analog design, HDLs, and EDA tools such as Cadence, Synopsys.
- Experience
- 3 years experience in R&D in industrial and academic institutions or S&T organizations
- Age Limit
- 55 years
- Post Code
- 3417
- Project
- GAP-3423, Multilevel capacity building and skilling in industry-aligned emerging technologies
- Group
- Societal Electronics Group (SEG)
Project Associate-I(PAT-I)1 post
- Qualification
- Four years B.Tech/ B.E in electronics/ electronics and communication/ electrical/ electrical and electronics or M.Sc in electronics or equivalent from a recognized university. Preferable: experience in integrated circuit design flow, hardware accelerators, sensor interface circuit design, analog design, HDLs, and EDA tools such as Cadence, Synopsys. Candidates with the above qualification without experience can also apply and shall be eligible for the position of PAT-I.
- Age Limit
- 35 years
- Note
- Candidates with the above qualification without experience can also apply and shall be eligible for the position of PAT-I.
- Post Code
- 3418
- Project
- FTT010606, Qualification of Piezoelectric uniaxial accelerometer module
- Group
- Societal Electronics Group (SEG)
Age Limit
Varies by post as on the last date of online application (02.11.2026): Senior PAT 40 years, PAT-II 35 years, Project Assistant-II 35 years, PAT-I 35 years, JRF 30 years, Project Associate-I and Project Associate-II 35 years, Project Scientist-I and Project Scientist-II 55 years
Age Relaxation
5 years for SC/ST/PwBD/Women/Third Gender and OBC-NCL candidates, 3 years for OBC, as per CSIR OM No. 5-1(342)/2017-PD dated 02-09-2024
Selection Process
- 1Screening of Applications
Received applications are screened by a duly constituted Standing Screening Committee, which may fix different criteria to shortlist candidates as per the project requirement.
- 2Online Interview
Shortlisted candidates appear for an interview through Microsoft Teams as a Guest; the link and the date and time are sent to the registered email.
Salary Structure
HRA admissible as per CSIR guidelines and subject to availability of funds in the project. Emoluments are fixed and differ by post.
PAT-II
Pay: Rs. 28,000 per month fixed; Rs. 35,000 to scholars selected through CSIR-UGC NET/GATE or national level examinations
Senior PAT
Pay: Rs. 42,000 per month fixed
Project Assistant-II
Pay: Rs. 20,000 per month fixed
PAT-I
Pay: Rs. 25,000 per month fixed; Rs. 31,000 to scholars selected through CSIR-UGC NET/GATE or national level examinations
JRF
Pay: Rs. 37,000 per month plus HRA as per ANRF/OM/N-01/2024
Project Scientist-I
Pay: Rs. 77,000 per month fixed
Project Scientist-II
Pay: Rs. 92,000 per month fixed
Project Associate-I(PAT-I)
Pay: Rs. 31,000 per month for candidates selected through CSIR-UGC NET/GATE or national level examinations; Rs. 25,000 for others
| Post | Pay |
|---|---|
| PAT-II | Rs. 28,000 per month fixed; Rs. 35,000 to scholars selected through CSIR-UGC NET/GATE or national level examinations |
| Senior PAT | Rs. 42,000 per month fixed |
| Project Assistant-II | Rs. 20,000 per month fixed |
| PAT-I | Rs. 25,000 per month fixed; Rs. 31,000 to scholars selected through CSIR-UGC NET/GATE or national level examinations |
| JRF | Rs. 37,000 per month plus HRA as per ANRF/OM/N-01/2024 |
| Project Scientist-I | Rs. 77,000 per month fixed |
| Project Scientist-II | Rs. 92,000 per month fixed |
| Project Associate-I(PAT-I) | Rs. 31,000 per month for candidates selected through CSIR-UGC NET/GATE or national level examinations; Rs. 25,000 for others |
How to Apply
- 1Read the instructions on the Project Staff Recruitment page of the CSIR-CEERI website.
- 2Fill the online application form on the CSIR-CEERI project staff recruitment portal.
- 3Upload scanned copies of the 10th and 12th standard certificates, diploma and degree certificates, post-graduation certificate, date of birth proof, category certificate, NET/GATE or equivalent exam certificate, experience certificate and other applicable certificates.
- 4Submit the online application before the last date and time.
- 5Take a printout of the application form after successful submission.
Documents to Carry / Upload
•10th Standard certificate
•12th Standard certificate
•Diploma degree certificate
•Graduation degree certificate
•Post-Graduation certificate
•Date of Birth proof
•Category certificate
•NET/GATE/equivalent exam qualification certificate
•Experience certificate
•Other applicable certificates
Important Details
- The engagement is purely temporary and is made on behalf of the sponsor of the projects.
- These are not CSIR-CEERI or CSIR posts and give the incumbent no right, implicit or explicit, to claim any post in CSIR-CEERI or CSIR.
- All essential qualifications and other conditions must be fulfilled as on the last date of receipt of online applications, 02.11.2026, which is also the date for determining the upper age limit, essential educational qualification and experience.
- Selected candidates are expected to join immediately and must bring all original testimonials including the application form, mark sheets, certificates and a passport size photograph, failing which the engagement can be withdrawn.
- The number of positions may be increased or decreased as per requirement.
Tenure and Six-Year Limit
Engagement is for six months initially or co-terminus with the present project or till the job to be performed exists, whichever is earlier, and may be extended in steps of six months based on satisfactory performance. Total service as Project Associate-I (PAT-I), Project Associate-II (PAT-II), Senior PAT, JRF, SRF, Project Assistant-I or Project Assistant-II must not exceed six years, counted together across CSIR-CEERI, Pilani and any other CSIR laboratory. Candidates who have already served six years or more in these positions are not eligible; those who have served less get a tenure only up to the remaining period.
AcSIR Ph.D. Students
AcSIR Ph.D. (Engineering/IDDP) students without any fellowship may apply only when their research domain of Ph.D. is aligned with the research area of the project, and only after obtaining permission from the Supervisor(s), the Project Investigator and approval from the Director, whose scanned copy must be uploaded on the portal. Students who hold a fellowship are not eligible to apply.
Reservation
As regards reservation, if all things are equal, SC/ST/OBC/PwBD/EWS candidates may be given preference over General candidates so as to ensure their representation.
Other Conditions
- The Screening Committee may fix a different set of criteria to shortlist candidates as per the project requirement.
- Shortlisted candidates will be informed through email or the institute website along with the date and time of the interview.
- Based on performance and availability of suitable candidates, the Selection Committee may recommend panels for future engagement in different projects.
- In case of false information in the online application, the competent authority will cancel the candidature and debar the candidate from attending interviews in future.
- The candidate will be allowed to join only after verification of original certificates and documents.
Contact
Email: [email protected] (recruitment queries), [email protected] (technical queries)
Phone: 01596-252275 (recruitment), 01596-252282 (technical)
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